SNIA Developer Conference September 15-17, 2025 | Santa Clara, CA
SSD Architecture Challenges with DRAM
Abstract
Today’s SSDs are reaching extreme capacities with some coming close to petabytes of storage capacity available to Hosts. However, the SSDs are commonly using embedded computing resources and embedded DRAM controllers to provide access to this massive quantity of storage. Some of the largest drives are leveraging an increased Indirection Unit (IU) size to extend the embedded resources of the drive.
This presentation will define an IU, and it will also explain how the embedded environment with IUs creates the rule of thumb for 1:1000 DRAM to NAND ratio. We’ll correct this rule of thumb together, and we will explore its limitations in the embedded environment. The presentation will continue to review some of the primary architectural options available to extend the limits of these embedded SSD environments. For example, an SSD might be split into several sub-domains. Alternatively, some DRAM selections and interaction models might be utilized. By the end of the presentation, attendees will know everything they need to start their career as an SSD architect for DRAM interactions. Most importantly attendees will understand why some changes are coming for these extreme capacity SSDs and some suggested SW changes to facilitate large IU drives in their storage stack.
Learning Objectives
Understanding DRAM impacts on SSDs and why these force increasing IU size
Trade offs available to solving increased IU sizes
Suggested host SW changes to facilitate increased IU sizes
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This presentation will define an IU, and it will also explain how the embedded environment with IUs creates the rule of thumb for 1:1000 DRAM to NAND ratio. We’ll correct this rule of thumb together, and we will explore its limitations in the embedded environment. The presentation will continue to review some of the primary architectural options available to extend the limits of these embedded SSD environments. For example, an SSD might be split into several sub-domains. Alternatively, some DRAM selections and interaction models might be utilized. By the end of the presentation, attendees will know everything they need to start their career as an SSD architect for DRAM interactions. Most importantly attendees will understand why some changes are coming for these extreme capacity SSDs and some suggested SW changes to facilitate large IU drives in their storage stack.