This keynote will showcase the innovations Samsung is making in storage devices through the SmartSSD concept and share its long-term vision to enable power-efficient green computing through data-centric computing. We would also like to invite the industry to collaborate on realizing data-centric computing across various accelerators for more power-efficient data processing

Learn what is happening in NVMe to support Computational Storage devices. The development is ongoing and not finalized, but this presentation will describe the directions that the proposal is taking. Kim and Stephen will describe the high level architecture that is being defined in NVMe for Computational Storage. The architecture provides for programs based on a standardized eBPF. We will describe how this new command set fits within the NVMe I/O Command Set architecture. The commands that are necessary for Computational Storage will be described.

The ongoing increase in application performance requirements from Cloud to Edge to on-premise use cases require tighter coupling of compute, memory and storage resources. Memory coherency and low latency attributes across converged compute infrastructures are being addressed in part with interconnect technologies including CXL 2.0 and UCIe. This presentation will provide a forward look into computational storage, computational memory developments and the interconnect standardization that enables them.

Andy will talk about the most recent developments around PMem use cases, OS developments, and future directions for PMem such as how it will use the emerging Compute Express Link (CXL) interconnect.

In this talk we will share our thoughts on computational storage and the special considerations for virtualized environments.  We will present real data from a prototype computational storage stack (based on NVMe/TCP)  and practical first steps that the industry can take toward fixed-function offloads, like data integrity and search.  More programmable offloads can build upon such a foundation.   

AI at Meta is across many applications/services and at scale - driving a portion of Meta's overall hardware and software infrastructure.  AI models scale faster than the underlying memory technology. This presentation discusses how an additional tier of memory can help and the options to enable this new memory tier.

Join the presenters from Day 1 in a lively panel discussion and ask your questions.

Server and storage applications are taking advantage of fast persistent memory in the form of NVDIMMs.  With the industry transition to DDR5 and CXL, NVDIMM architecture which is aligned with industry standards is emerging to solve the ongoing need for high-speed access to persistent memory for write acceleration applications.

Join Summit Chair David McIntyre for a humorous recap of Day 1 of the Summit.

With more and more fast devices (especially persistent memory, aka. PMEM) equipped in data center, there is great pressure on CPU to drive those devices (e.g., Intel Optane DC persistent memory) for persistency purpose under heavy workloads. Because there is no DMA related capability provided by persistent memory compared with those hdds and SSDs.  Thus CPU needs to participate the data operations on the persistent memory all the time. In this talk, we would like to mitigate the CPU pressure via hardware based memory offloading devices (e.g., Intel's IOAT and DSA).