Abstract
The emerging Compute Express Link (CXL) includes support for memory devices and provides a natural place to attach persistent memory (pmem). In this talk, Andy describes the additions made to the CXL 2.0 specification in order to support pmem. Device identification, configuration of interleave sets and namespaces, event reporting, and the programming model will be covered. Andy will describe how multiple standards like CXL, ACPI, and UEFI all come together to continue to provide the standard SNIA NVM Programming Model for pmem.