SNIA Developer Conference September 15-17, 2025 | Santa Clara, CA
Abstract
In the recent past computer architecture has begun on a long journey that will cause a merger of processing and storage, which have historically been separate. This will accelerate data processing while helping to reduce cost, all the benefit of cost/performance statistics. This presentation will show how today’s persistent memory is just the beginning of a trend to bring persistence deeper into the processor, first in cache memories, followed by persistent registers within the processor itself. At the other end of the spectrum we will see how computational storage offloads processor tasks to lighten both processor load and network traffic and learn why this technique makes systems scale in a significantly more linear way. We will explore other areas that could benefit from this approach but where it has not yet been tried.