Abstract
Compute Express Link™ (CXL™) is a high-speed CPU-to-Device and CPU-to-Memory interconnect designed to accelerate next-generation data center performance. CXL is an open industry-standard interconnect offering coherency and memory semantics using high-bandwidth, low-latency connectivity between host processor and devices such as accelerators, memory buffers, and smart I/O devices. CXL technology is designed to address the growing needs of high-performance computational workloads by supporting heterogeneous processing and memory systems for applications in Artificial Intelligence, Machine Learning, communication systems, and high-performance computing.
Released in November 2020, the CXL 2.0 Specification adds new features – including support for switching, memory pooling for increased memory utilization efficiency, and persistent memory – all while maintaining full backwards compatibility with CXL 1.1 and 1.0. CXL 2.0 provides standardized management of the persistent memory interface and enables simultaneous operation alongside DDR, freeing up DDR for other uses. In this presentation, attendees will learn how CXL 2.0 supports persistent memory, CXL use cases, and what’s ahead for the Consortium.