CMS Summit 2024 Speakers

webinar

 

Richelle Ahlvers, Vice Chair and Executive Committee, SNIA

Richelle Ahlvers is a Storage Technology Enablement Architect at Intel, where she promotes and drives enablement of new technologies and standards strategies.

Richelle has spent over 25 years in Enterprise Storage R&D teams in a variety of technical roles, enabling new technology ecosystems, leading the architecture, design and development of storage array software, storage management software user experience projects including mobility, developing new storage industry categories including SAN management, storage grid and cloud, and storage technology portfolio solutions.

Richelle has been engaged with industry standards initiatives with SNIA and DMTF for many years. She serves on the SNIA Board of Directors, the Chair of the Storage Management Initiative, and has led the SSM Technical Work Group developing the Swordfish Scalable Storage Management API from the group’s inception; she is the alliance liaison between SNIA and DMTF, as well as the alliance liaison for OFA, OCP, and the SODA Foundation. She has also served as the SNIA Technical Council Chair and been engaged across a breadth of technologies ranging from storage management, to solid state storage, cloud, and green storage.

Richelle has also initiated and led both site and corporate level women's diversity forums, and presents regularly at diversity conferences. https://www.linkedin.com/in/richelleahlvers/

Mike Allison, Sr. Director NAND Product Planning – Standards, Samsung Semiconductor

Mike Allison is a Sr. Director in the Samsung DSA Product Planning and Business Enablement team focusing on standards for existing and future products. He has been a participating member of SNIA Data Placement TWG and SFF TA TWG. He is an author of many NVMe technical proposals (and the lead author of the NVMe™ Live Migration proposal), chair of the NVMe Errata Task Group, Samsung alternate for the NVMe Board of Directors, and a represents the OCP Storage Project on the OCP Steering Committee. For over 38 years, Mike has been an embedded firmware engineer and architect working on systems and simulations for laser beam recorders, fighter aircraft, graphics cards, high end servers, and is now focusing on Solid State Drives. He holds 31 patents in graphics, servers, and storage. He has earned a BSEE/CS at University of Colorado, Boulder.

 

JB Baker, VP of Product and Marketing, ScaleFlux

JB Baker is a successful technology business leader with a track record of driving top and bottom line growth through new products for enterprise and data center storage.  He joined ScaleFlux in 2018 to lead Product Planning & Marketing as ScaleFlux expands the capabilities of computational storage and its adoption in the marketplace.

Sudhir Balasubramanian, Senior Staff Solution Architect and Global Oracle Practice Lead, VMware By Broadcom

Sudhir has been at VMware since 2012  as Senior Staff Solution Architect & Global Oracle Practice Lead. He has 27+ years Oracle hands-on experience.  His roles have included: Principal Oracle DBA / Architect, Oracle RAC/Data Guard Expert, experienced in  EMC SAN Technologies, Principal Oracle DBA/Oracle Architect (1995 – 2011) [Tata Consultancy Services (TCS), Sony Electronics, Newgen Results (Aspen) ,Teletech Corp, SAIC, Active Network, Sempra Energy Holdings]; VMware VCA – Cloud ,VMware vBCA Specialist, VMware vExpert; Member of the Office of the Chief Technical Ambassador VMware (Alumni); Oracle ACE.  He is the aeading author of “Virtualizing Oracle Business Critical Databases on VMware SDDC”.  Sudhir is a recognized Speaker at  Oracle Open World, IOUG, VMworld, VMware Partner Exchange, EMC World, EMC Oracle Summit and Webinars.

Andy Banta, Storage Janitor, Magnition IO

Andy has over 30 years of experience in high-tech industry giants. He worked on development teams at SCO, Sun Microsystems, VMware and NetApp-SolidFIre producing primarily storage and networking products. Andy is known for promoting simplicity and economy and has presented at numerous conferences, technology events and podcasts. Outside of high tech, Andy is involved in auto racing, auto restoration and hiking. His interests include travel, wines and food.

Kurtis Bowman, Marketing Working Group Co-Chair, CXL Consortium

Kurtis Bowman is the Marketing Working Group Co-Chair of the CXL Consortium and Director, Server System Performance at AMD. With more than 25 years of experience in the architecture, development, and business justification of server, storage, commercial, and consumer computing products, his current areas of interest include converged and hyperconverged systems, heterogeneous compute elements for HPC & machine learning, and data analytics. He has built teams and managed firmware and hardware development through entire lifecycles in both startups and mature companies. Mr. Bowman earned a BSEE from New Mexico State University, holds multiple patents, and has written articles in the technical and trade press.

John Cardente, Member of Technical Staff, Dell Technologies

John Cardente is a Member of Technical Staff in the CTO Office of Dell’s Infrastructure Solutions Group. He began his career at Data General developing distributed cache coherency protocols and high-speed fabrics for the NUMALiiNE series of x86 ccNUMA servers. After EMC’s acquisition of DG, John worked in various EMC storage CTO and Advanced Development teams developing innovations related to solid state storage, storage virtualization, tiered storage, distributed file systems, and converged file-block storage systems. In 2013, John transitioned to data science and spent 5 years in the EMC Corporate CTO Office leading various AI research initiatives. In 2018, John joined the Boston Consulting Group to lead a data science team in building a cognitive search platform responsible for driving BCG’s consulting business. John returned to Dell in late 2021 to work on strategic technical initiatives for AI infrastructure with a strong focus on storage solutions for AI workloads.

John is based in Hopkinton Massachusetts. He holds BS and MS Computer Engineering degrees from WPI, an MBA from Northeastern University, and has completed additional graduate level studies in Advanced Computer Science (WPI) and AI (Stanford).

Larrie Carr, VP of Engineering, Rambus, Inc.

Larrie Carr is the VP of Engineering at the newly formed Interconnect SoC business unit at Rambus Inc. He is leading the development and architecture of Rambus’ new product initiatives which are focused on enabling memory connectivity, expansion, pooling, and switching using CXL technology.

Before Rambus, Larrie was a Technical Fellow at Microchip Technology responsible for technical strategy and architectural guidance for Microchip’s broad portfolio of datacenter solutions, including serial memory controllers, SSD controllers, RAID solutions, PCIe switches, SAS expanders, and other initiatives not publicly announced. During that time, Microchip provided significant contributions to the CXL 2.0 standard in the areas of switching and fabric management under Larrie’s supervision.

While at Microsemi Corporation (later acquired by Microchip), Larrie led internal innovation and external technical engagements related to OpenCAPI, Gen-Z, Compute Express Link (CXL) and RISC-V within the Microsemi CTO organization. Among other outcomes, these engagements resulted in the development and eventual productization of the industry’s first in-production serial memory controller ASIC (OMI to DDR4). Prior to Microsemi, Larrie led product architecture for PMC-Sierra’s enterprise storage business unit from inception to an industry leadership position. During that tenure he established PMC-Sierra as a technology leader in the area of storage connectivity, security, reliability, availability, and serviceability – concepts that extend well into the tiered memory architecture that the CXL standard will enable. He also served as a private consultant conceiving many of the industry’s first-generation non-volatile memory solutions.

He earned a bachelor’s degree and master’s degree in electronic engineering from Simon Fraser University in Vancouver, Canada.

 

 

 

 

 

Tom Coughlin, President, Coughlin Associates/President, IEEE

Tom Coughlin is a digital storage analyst and business and technology consultant.  He has over 37 years in the data storage industry with engineering and management positions at several companies.  Coughlin Associates consults, publishes books and market and technology reports (including The Media and Entertainment Storage Report), and puts on digital storage-oriented events.  He is a regular storage and memory contributor for forbes.com and M&E organization websites.  Tom is an IEEE Fellow and President-Elect, and is active with SNIA and SMPTE. 

Sandeep Dattaprasad, Senior Product Manager, Astera Labs

Sandeep Dattaprasad is a Senior Product Manager at Astera Labs with 15+ years of experience in semiconductor, software diagnostic tools, developing security strategies and firmware development for complex SoC product lines including Compute Express Link products, SAS RAID controllers, SAS expanders and PCIe switches. He is also a contributing member of the CXL Consortium. At Astera Labs, Sandeep’s focus is on driving product strategy for new market segments by translating data center bottlenecks into profitable and competitive hardware and software solutions using CXL technology.

 

 

Garima Desai, Sustainability Manager, Samsung Semiconductor

Garima Desai is a sustainability professional currently working for Samsung Semiconductor, where she serves as a subject matter expert and strategist. Garima’s background includes professional experience in transportation consulting and researching for top environmental NGOs including World Resources Institute (WRI). She holds two bachelor’s degrees from UC Santa Cruz and holds two master’s degrees in economics and sustainability from Oxford University in England, where she was a Rhodes Scholar.

Jonmichael Hands, Co-Chair, SNIA SSD Special Interest Group

Jonmichael Hands partners with the storage vendors for Chia optimized product development, market modeling, and Chia blockchain integration. Jonmichael spent the last ten years at Intel in the Non-Volatile Memory Solutions group working on product line management, strategic planning, and technical marketing for the Intel data center SSDs. In addition, he served as the chair for NVM Express (NVMe), SNIA (Storage Networking Industry Association) SSD special interest group, and Open Compute Project for open storage hardware innovation. Jonmichael started his storage career at Sun Microsystems designing storage arrays (JBODs) and holds an electrical engineering degree from the Colorado School of Mines.

Charles Fan

Jim Handy, General Director, Objective Analysis

Jim Handy of Objective Analysis has over 35 years in the electronics industry including 20 years as a leading semiconductor and SSD industry analyst. Early in his career he held marketing and design positions at leading semiconductor suppliers including Intel, National Semiconductor, and Infineon. A frequent presenter at trade shows, Mr. Handy is known for his technical depth, accurate forecasts, widespread industry presence and volume of publication. He has written hundreds of market reports, articles for trade journals, and white papers, and is frequently interviewed and quoted in the electronics trade press and other media. He posts blogs at www.TheMemoryGuy.com and http://www.TheSSDguy.com

Eric Hibbard, Director, Product Planning - Storage Networking & Security, Samsung Semiconductor, Inc.

Eric A. Hibbard is the Director, Product Planning – Security at Samsung Semiconductor, Inc. and a cybersecurity and privacy leader with extensive experience in industry and U.S. Government. He also has experience architecting and auditing information and communications technology (ICT) infrastructures and solutions involving a wide range of technologies (IoT, cloud, storage, big data, AI, smart cities, blockchain) in organizations throughout the world. 

Mr. Hibbard holds leadership positions in standards development organization and industry associations, including ISO/IEC, INCITS, the IEEE Computer Society, the American Bar Association (ABA), the Cloud Security Alliance (CSA), and SNIA. Hibbard is or has served in an editorship role on several international standards projects: ISO/IEC 22123 (Cloud computing – Vocabulary/Concepts/Reference Architecture), ISO/IEC 27050 (Electronic discovery), ISO/IEC 27040 (Storage security), ISO/IEC PAS 20648 (TLS for storage systems), ISO/IEC 27404 (Cybersecurity labelling framework for consumer IoT), and IEEE 1619-2018 (XTS-AES).

Mr. Hibbard possesses a unique set of professional credentials that include the (ISC)2 CISSP-ISSAP, ISSMP, and ISSEP certifications; IAPP FIP, CIPP/US and CIPT certifications; ISACA CISA and CDPSE certifications; and CSA CCSK certification. He has a BS in Computer Science.

 
Jim Handy

Shyam Iyer, Chair, SNIA SDXI Technical Work Group; Distinguished Engineer, Dell Technologies

Shyam Iyer is the Chair of the SNIA SDXI (Smart Data Acceleration Interface) Technical Work Group, which is developing, extending and driving an extensible, virtualizable, forward-compatible, memory to memory data movement and acceleration interface standard. He is a Distinguished Engineer in Dell's Office of CTO for Servers with many years of experience researching, designing, developing, debugging, validating, leading and driving system and software solutions that have an industry wide impact.

Arvind Jagannath, Lead Platform Product Manager, VMware By Broadcom

Arvind Jagannath works in Product Management at VMware. With over 25 years of experience in the industry working on networking, storage, embedded, and kernel development, he currently leads infrastructure and core platform enablement for vSphere, working across the VMware ecosystem of server, IO, and storage partners. Arvind most recently drove platform product management at Cohesity and NetApp. Arvind holds an MBA from the University of Chicago, Booth school of Business and a Bachelors in Computer Science and Engineering from India.

Dominic Manno, Sr. Scientist, Los Alamos National Laboratory

Dominic Manno is a research scientist with background in storage systems and software development focused in high performance computing. He is currently the file systems technical lead for the HPC pision at Los Alamos National Laboratory. This work includes leading design, development, and integration for HPC file systems deployed to support simulation science at LANL. Dominic also leads a subset of storage research efforts at LANL’s Ultrascale Systems Research Center where his work is focused on next generation storage systems for HPC datacenters. His most recent contributions include failure analysis impacting system design, metadata indexing, and computational storage research. He has contributed to multiple R&D100 winning entries including work on the Grand Unified File Index, a secure user metadata indexing system, and was part of a team that received a Government Innovation Award for computational storage work.

Bill Martin, Co-Chair, SNIA Technical Council; Principal Engineer, SSD IO Standards, Samsung Electronics Co., Ltd. 

Bill has been involved in the storage industry for over 40 years, starting in 1983 with the development of a proprietary optical interface for HP storage, architecting the HP Tachyon interface chip for Fibre Channel, serving on industry consortiums and standards bodies for storage including SNIA, INCITS T11, INCITS T10, INCITS T13, SATA-IO, and NVMe. He has demonstrable skills in gaining industry agreement in a variety of technologies and bringing together competitors for the advancement of the industry.

In addition to his role representing Samsung in SSD IO Standards, Bill currently holds the following industry leadership roles: co-chair of the SNIA Technical Council, Chair SNIA CMSI, co-chair SNIA CS TWG, Co-Chair SNIA SDP TWG, co-Chair SNIA Standards Committee, Board member of the NVMe Board of Directors, Co-Chair Computational Storage TG, Chair of INCITS T10, Secretary of INCITS T13.

Paul McLeod, Product Director, Supermicro

Paul is a seasoned technology professional with over 25 years of experience in the enterprise storage industry. He is a strong customer advocate with deep understanding of the changing landscape in the storage domain. An early champion of Software Defined Storage and the emerging methods being used to create scalable data pipelines for HPC and AI environments.

David McIntyre, Director, Product Planning and Business Enablement, Samsung Corporation

David McIntyre leads data centric and sustainable memory, compute and storage acceleration solutions development at Samsung, for applications including AI inference,  database search and CXL applications. He has held senior management positions with AMD, Intel, IBM and at Silicon Valley startups.  He has consulted for institutional investors including Fidelity, Goldman Sachs and UBS. David is a frequent presenter at industry conferences as well as a contributing chairperson across multiple SNIA initiatives and SIGs.

Ahmed Medhioub, Product Line Manager, Astera Labs

Ahmed Medhioub is a Product Line Manager with over 10 years of experience in industrial IoT, server, storage and data center industries specializing in PCI Express, NVM Express and Compute Express Link (CXL) interconnects. He is focused on driving product strategy and road map for Astera Labs CXL Memory Expansion and pooling products, technical pre-sales and customer design collaboration, with a proven track record of fostering productive relationships across teams.

J Michel Metz, Ph.D, Chair, Ultra Ethernet Consortium

J is a Technical Director for Systems Design for AMD and holds several roles of influence in the tech industry. He is currently serving his 4th term as Chair of the Board of Directors of SNIA, as well as the inaugural Chair of the Ultra Ethernet Consortium formed in 2023.
 
Recognized as a leading storage networking expert, J is an evangelist for all related technologies and has a unique ability to dissect and explain complex concepts and strategies. He is passionate about the inner workings and application of emerging technologies.He does so by coordinating and leading strategic initiatives related to systems architecture, including storage and networking. 
 
J has previously held roles in both the startup ecosystem and Fortune 100 companies as a Field CTO, R&D Engineer, Solutions Architect, and Systems Engineer. His extensive leadership across several key industry standards groups, SNIA, and former board member of the Fibre Channel Industry Association (FCIA), and Non-Volatile Memory Express (NVMe). He was crucial in the founding of the Ultra Ethernet Consortium (UEC), one of the fastest-growing projects in the Linux Foundation. 
 
J is a sought-after entertaining presenter and a prolific writer. He has won multiple awards as a speaker and author, writing over 300 articles and giving presentations and webinars attended by over 10,000 people. 
 
A popular blogger and active on Twitter, his areas of expertise include high-performance storage and networking solutions. He earned his PhD from the University of Georgia.

Jason Molgaard, Co-Chair, SNIA Computational Storage Technical Work Group/Principal Storage Solutions Architect, Solidigm

Jason Molgaard is an experienced storage controller architect having worked for various storage device companies architecting and designing HDD and SSD storage controllers. As a Principal Storage Solutions Architect on the Solidigm Pathfinding and Advanced Development Team, Jason focuses on future storage controller architectures and technologies, including Computational Storage and CXL. Jason is also co-chair of the SNIA Computational Storage TWG and helps drive the Computational Storage standard. Jason holds a Master of Science degree in Electrical Engineering and is a member of the SNIA Technical Council.

Brian Rea, Marketing Work Group Co-Chair, UCIe Consortium

Brian Rea is a senior technologist in the industry initiative and technology enabling team at Intel and is the Marketing Working Group Co-Chair for the UCIe Consortium.  Brian has held engineering, marketing, and strategic planning roles bringing products with new technologies to market including USB, Gigabit Ethernet, PCIe, and CXL. His passion is working with customers and partners to enable ecosystem innovations in silicon, hardware, and software. Brian holds an MBA from the University of Washington and a BSEE from the University of Texas at Austin.

Steve Scargall, Senior Product Manager and Software Architect, MemVerge

As a Senior Product Manager and Software Architect at MemVerge, Steve Scargall stands at the forefront in the field of memory technology, where he pioneers the development of cutting-edge software-defined memory solutions leveraging Compute Express Link (CXL) devices. With a rich kernel development, file system development, and performance analysis background, Steve possesses a unique blend of technical acumen and visionary leadership. His work seamlessly connects the dots between theoretical innovation and practical utility in-memory technology, setting new benchmarks for excellence in the industry. Steve's expertise drives the advancement of MemVerge's product offerings and shapes the future direction of memory technology applications.

 

Donpaul Stephens, Founder and CEO, AirMettle, Inc.

Donpaul Stephens is a serial entrepreneur best known as the founder of Violin Memory where he developed the original concept; hired and led the team; raised venture capital from strategic, institutional, and individual investors; established key strategic partnerships in both supply chain and go-to-market partners; and developed multiple accounts. He architected AirMettle’s approach for parallel in-storage analytics and has led the company’s development from inception to date.

Paul Suhler, Principal Engineer, SSD Standards, KIOXIA

 

Paul Suhler has been active in the data storage world for nearly thirty years, working for companies which include KIOXIA, Micron, WD/HGST, and Quantum. He is a software and firmware engineer, and has managed the development of storage devices for companies such as Quantum and Adaptec. He is the chair of the IEEE Security in Storage Working Group, and has contributed to standards developed by organizations such as NVM Express, SNIA, and the INCITS SCSI (T10) and Fibre Channel (T13) committees. He served as the Deputy Director of the USC Advanced Computer Architecture Laboratory, and commanded US Army combat engineer companies in Korea and California. He holds a PhD in computer engineering from the University of Texas at Austin. He is a Life Senior Member of IEEE and a member of ACM.

 

Prasad Venkatachar, Sr. Director Solutions and Products, Pliops

Prasad Venkatachar is Sr Director Solutions & Products at Pliops. He is focused on Product strategy and leading and driving Data, Analytics & Storage solutions with partners.   He has launched multiple industry-leading Data & AI/ML products & solutions collaborating with Microsoft, IBM, Oracle, Cloudera, and ISV partners to grow revenue & gain market share at Lenovo & HPE.  He also served as a Microsoft Data and AI Partner Advisory Council Member and Member of Lenovo Technology Innovation. Served fortune 500 enterprise customers as SME to deliver business value outcomes for Datacenter and Cloud deployments. He has good experience and certified with Multiple Cloud (AWS/Azure/GCP/IBM) and Database (Oracle/DB2/Azure Data) and AI/ML certifications.  A regular speaker in Industry Conferences: Microsoft Ignite, Oracle Open World, Developer conferences: Pass Summit, Oracle users group, Flash Memory Summit,SNIA & Gartner Conference

Manoj Wadekar, Hardware Systems Technologist, Meta

Manoj Wadekar is a Hardware Systems Technologist for Meta Platforms Inc. He joined the company in 2018 as a Lead Storage Architect for the company's storage systems. Manoj has been designing and building servers, storage, and network solutions for over 30 years. Before joining Meta, he held lead engineering positions at eBay and QLogic. Early in his career, he worked with Intel for over a decade as a Senior Staff Architect and Senior Engineering Manager. Wadekar earned a Master's degree in Electrical Engineering from the Indian Institute of Technology and a Bachelor's degree in Electronic and Telecommunications from the Walchand College of Engineering.

 

Andy Walls, Chief Architect, IBM Fellow, IBM Corporation

Andy Walls is Chief Architect and CTO for IBM’s Flash Systems pision. He is also an IBM Fellow, the company’s most prestigious honor. A 35-year storage industry veteran, Andy is a pioneer in enabling flash memory in the enterprise. He has developed enterprise storage systems that achieve high performance, good endurance, and the availability data centers require. He was responsible for the Texas Memory Systems acquisition and has since defined the architecture for all FlashSystem products. He is currently defining next generation products that can be used in traditional SAN environments as well as in clouds and by emerging workloads. He is widely recognized an expert in storage and flash memory. He has designed ASICs, PCBs, firmware stacks, and systems. Known as an innovator, he has filed over 100 patents. Andy earned a BSEE from UC Santa Barbara.

Jeff White, CTO, Edge Product and Operations, Dell Technologies

 Jeff is the CTO for Edge at Dell Technologies. Jeff’s leads the research and development of Edge technologies for Dell’s product and operations. His technology focus is on edge application execution characterization and management, edge scheduling/control algorithm design, edge data management, AI/ML edge operations, AI/ML drift detection and mitigation, edge networking optimization, and emerging machine reasoning control for distributed platforms. He holds 10 patents in these areas.

Jeff has also held senior roles at early-stage artificial intelligence/machine reasoning-based robotic process automation technology provider and served as CTO of Elefante Group, a stratospheric wireless communications platform. He also held senior positions at Hewlett Packard Enterprise, Ericsson and Alcatel-Lucent where he led technology initiatives, solutions development, business development and services delivery. Prior Jeff worked at Cingular Wireless and BellSouth in technology and operations roles.
 

 Steven Yuan, Founder and CEO, StorageX

Steven has over 20 years of experience in the industry, beginning his career in the early days of flash memory and later becoming a senior architect for solid-state drives, storage systems, and data acceleration solutions. He has held various senior-level technical and leadership positions at Intel, Micron, and Western Digital, with his work spanning many aspects of enterprise and data center solutions on the memory, storage, SoC and system side. Over the past 20 years, his team has successfully delivered numerous products and launched them as comprehensive solutions for major data center players. Steven's experience and interests range from AI/ML, emerging memory, data center storage, and computing.

 

 

As the founder of StorageX, his current focus is on transforming compute and storage architecture into a more sustainable system capable of addressing the challenges of rapidly growing data sizes, reduced application latency, and extreme demand for computing resources in various areas. Enabling data-centric computing is a key solution for this future world. At SNIA, Steven is a member of the SNIA Compute, Memory, and Storage Initative (CMSI) Governing Board.